The IQM Emerald 54-qubit GHZ entanglement result was announced on October 29 by IQM Quantum Computers, a Finnish superconducting quantum hardware company listed on Nasdaq under the ticker IQMX. The company says its Emerald processor has entangled all 54 of its qubits simultaneously for the first time, certified through a 54-qubit Greenberger-Horne-Zeilinger state. The certification came through a 54-qubit Greenberger-Horne-Zeilinger state, a standard benchmark in quantum information research in which every qubit must end up correlated with every other. IQM recorded a GHZ fidelity of 0.516 across the full chip, above the 0.500 threshold that by established theory certifies genuine multipartite entanglement that cannot be explained by classical correlations. A companion measurement at 40 qubits, taken without the readout error mitigation applied to the full-chip run, returned 0.515, which the company published as a transparency measure so outside researchers can compare results across methodological choices. The practical consequence is immediate: until this announcement, a customer running a comparable circuit on IQM Resonance could reliably use only about 30 of the chip’s 54 qubits in a single computation, and published studies on large quantum processors routinely use between 10 and 20 qubits even when the hardware nominally supports far more. Emerald is built on IQM’s Crystal 54 architecture, a square lattice of 54 superconducting transmon qubits with tunable couplers between nearest neighbours, giving each interior qubit four connections. The company credits an automated state-preparation routine that chooses which two-qubit gates to apply and in what order, weighing each gate’s measured fidelity against the idle time the choice imposes on qubits already entangled, together with roughly a year of calibration work including a new calibration methodology, an improved gate set and dynamical decompression applied across the processor. IQM says those changes cut error rates for quantum operations by up to 50 percent.
What the IQM Emerald 54-qubit GHZ entanglement result establishes
The announcement provides a meaningful hardware stress test, but it should not be confused with a general demonstration of quantum computational advantage. A GHZ state is a benchmark for multipartite entanglement. Its ideal form combines a superposition of all qubits being zero with a superposition of all qubits being one, subject to the appropriate phase relationship. The state does not by itself deliver a commercially valuable algorithm, and its structure can be efficiently represented for classical simulation.
Its importance as a test is scale. Creating one state across 54 qubits requires the processor, couplers, control electronics, calibration data and state-preparation sequence to operate coherently as a single system. If one qubit or connection behaves poorly, the measured fidelity can fall below the point where the result certifies genuine multipartite entanglement. The 0.516 full-chip figure clears that line by 0.016, while the unmitigated 40-qubit result of 0.515 suggests that readout correction is not the only reason the measurement succeeded.
There are important limits. The full-chip 0.516 value used readout error mitigation, and IQM has not published an uncertainty for that figure. It also has not disclosed an unmitigated fidelity for all 54 qubits. The result was presented as a company announcement, and no independent party has yet reproduced it. Claims about the strength of the result and its effect on customers are therefore company statements that will require outside testing.
Why GHZ fidelity can be misleading
GHZ fidelity is often reduced to a threshold, but the number alone does not describe every aspect of an experiment. A score above 0.500 is accepted as a sufficient condition for genuine multipartite entanglement, meaning that the observed correlations cannot be reproduced by separable states or by the relevant mixture of entangled and unentangled groups. That is a strict certification point, but it does not reveal how far above the threshold the state lies or how stable the estimate is across repeated runs.
Readout error mitigation is another source of context. A processor measures quantum states through electronics that can introduce classification errors. Mitigation attempts to estimate and reduce those errors using additional calibration information. If the correction is poorly matched to the data, it can also distort the reported fidelity, so an independent analysis must examine both the method and its assumptions. IQM’s decision to publish the 40-qubit result without mitigation is useful because it offers a comparison point, although it does not substitute for an unmitigated 54-qubit measurement.
There is also a difference between entangling a processor and operating it reliably for general workloads. A GHZ circuit is highly structured, and the optimized sequence can focus on favourable qubit pairs and gate orders. Other algorithms may require different connectivity patterns, deeper circuits, intermediate measurements or repeated execution. The announcement therefore raises the practical ceiling for comparable workloads, but it does not establish that every 54-qubit circuit will run with equal quality.
How the full-chip result was engineered
Emerald contains 54 superconducting transmon qubits laid out in a square grid, with tunable couplers linking nearest neighbours. That topology gives interior qubits four connections, which can reduce the depth needed to distribute interactions compared with line or ring arrangements. The native entangling operation is the controlled-Z gate, produced by adiabatically changing the coupling between adjacent qubits.
Large GHZ preparation is difficult because errors accumulate as the state grows. At minimum, joining 54 qubits into one entanglement chain takes 53 two-qubit interactions. Every gate introduces some chance of failure, while qubits that have already joined the state continue to decohere while later gates are executed. At the end, all 54 qubits must also be read out reliably. The engineering challenge is consequently a scheduling problem as much as a materials or fabrication problem.
IQM says its automated state-preparation routine addresses that scheduling challenge by selecting both participating qubits and the order of two-qubit gates. It uses measured gate fidelities as one input and idle duration as another, seeking routes that preserve high-performing connections while reducing the time already-entangled qubits wait. The company’s public benchmark documentation also describes a tree-style method designed for square-grid processors such as Emerald.
The wider improvement program included a revised calibration methodology, an improved gate set and dynamical decoupling across the processor. Dynamical decoupling applies timed microwave pulse sequences during idle periods, helping refocus some of the dephasing caused by low-frequency environmental noise. IQM also selected qubits with stronger coherence for positions considered especially sensitive to errors. The company says the combined work reduced error rates for quantum operations by as much as 50 percent. Those reductions and their contribution to the GHZ result remain vendor claims pending independent examination.
What cloud users can test now
IQM says the same state-preparation and calibration improvements are available through IQM Resonance, its cloud platform. That changes the announced practical limit for users preparing circuits across the device from roughly 30 qubits to the full 54-qubit architecture, subject to the workload and current system conditions. The platform supports Qiskit, Cirq, CUDA-Q, TKET and Qrisp, and exposes features such as pulse-level control, readout error mitigation and the dynamical decoupling sequence used on Emerald.
Researchers can also examine IQM’s open-source benchmarking tools. The suite provides several GHZ circuit constructions, multiple fidelity-estimation methods and worked examples designed to compare mitigated and unmitigated measurements. That creates a practical route for independent evaluation: cloud users can run the published example, inspect how the fidelity changes with qubit layout, and test whether the 0.516 result can be reproduced on the same hardware.
Comparisons with other processors require care. Earlier demonstrations have reported larger GHZ states, including results from IBM and Zhejiang University, but qubit count alone does not settle which system offers better performance. Some larger experiments used error detection and discarded many runs, while others selected subsets because of wiring constraints. IQM’s distinction is that it entangled every qubit on a commercially accessible 54-qubit processor. The benchmark is still a company-led result, and independent reproduction will be needed to assess its durability.
The next test is repeatability
The central achievement from IQM Quantum Computers is not merely a larger qubit count. It is evidence that Emerald’s calibration, automated gate sequencing and full-chip control can keep enough qubits coherent to cross a recognized entanglement threshold. That offers cloud researchers a more capable platform and gives the company a credible basis for claiming that full-chip access has moved from a nominal specification into an operational one. The IQM Emerald 54-qubit GHZ entanglement result is a company announcement that has not been independently reproduced, and the narrow margin over the threshold means cloud users will be the ones who settle whether the claim holds.
For now, the caveats belong beside the achievement. The full-chip figure relies on readout error mitigation, no uncertainty was provided, no independent party has yet reproduced the measurement and the vendor’s performance claims remain company statements. The IQM Emerald 54-qubit GHZ entanglement result will become more persuasive when outside users reproduce it, publish full uncertainty estimates and determine whether gains persist across repeated runs and varied workloads. Until then, it is a strong hardware benchmark and a useful new ceiling for cloud access, rather than final proof of fault-tolerant quantum computing.