On Sept. 10-11, 2026, Positron AI announced an $875 million Positron AI inference chip Series C round at a $5 billion post-money mark, structured across two tranches and anchored by a roster of deep-pocketed semiconductor investors. The first $375 million Series C closed at a $3.5 billion pre-money valuation. The second $500 million Series C-1 followed, led by NEA alongside Netscape and Silicon Graphics founder Jim Clark. The structure effectively re-priced the prior round in the span of months, jumping from a $1.06 billion post-money Series B in February 2026 to roughly five times that figure today.
Positron AI inference chip Series C: Who Wrote the Checks
NEA, Andra Capital, Atreides Management, Valor Equity Partners, and Dylan Patel’s SemiAnalysis Capital co-led the initial $375 million tranche. NEA and Jim Clark then co-led the $500 million C-1. The supporting cast included DFJ Growth, Qatar Investment Authority, Cisco Investments, Naver Ventures, and Hudson River Trading, a mix of strategic corporate capital, sovereign wealth, and quantitative trading desks. Four new board seats were filled: Forest Baskett from NEA, Gavin Baker from Atreides, Thomas Jermoluk, and Dylan Patel. Forest Baskett framed the deal in unusually direct terms, calling it “the boldest memory-first bet in AI hardware.”
Where the Money Goes
Three line items dominate the use of funds. First, the Asimov tapeout is scheduled for the end of 2026 on TSMC’s N3P process, with volume production targeted for the second half of 2027. Second, a 2 MW-plus engineering data center build is underway to support the design pipeline. Third, the production ramp for Titan, the rack-scale system that binds multiple Asimov chips into a single inference domain, is being funded out of the round. CEO Mitesh Agrawal was characteristically blunt about the timing: “Speed matters in this market, both in how quickly we ship new generations of silicon and how quickly they reach customers.”
The Memory Bet Behind Asimov and Titan
Asimov is the chip that the company is betting the franchise on, and the bet is explicit: avoid HBM and CoWoS entirely. Each Asimov part carries between 288 GB and 2,304 GB of memory built from commodity LPDDR5X, and the architecture is engineered to consume more than 90 percent of available memory bandwidth. The pitch is that large-context inference, the workload driving demand for million-token context windows, is fundamentally bandwidth- and capacity-bound, and that the HBM/CoWoS supply chain is now the binding constraint for the entire industry. The timing of Nvidia’s reported Rubin Ultra revision, scaled back from 1 TB of HBM4E per package toward roughly 192 GB due to supply, is the data Positron is pointing to. Titan then stitches four to eight Asimov chips into a single node, scales to thousands of nodes, and targets models above 16 trillion parameters with context windows exceeding 10 million tokens.
What the Company Already Ships
Positron is not pre-revenue. The first-generation Atlas platform is already deployed in more than 50 racks inside Oracle Cloud Infrastructure, with Parasail operating as a key go-to-market partner. Jump Trading and i3d.net are listed as production customers, both workloads that stress low-latency, high-throughput inference for financial and networking applications. The Series C is therefore less of a moonshot raise and more of a scaling raise, with a defined customer base underwriting the inference demand that Asimov is being taped out to serve.
Valuation Math and Market Context
The Series B in February 2026 priced the company at $1.06 billion post-money on a $230 million round. Seven months later, the same cap table is being marked at roughly $5 billion post-money, a 372 percent step-up. For a hardware company at the tapeout stage of its second-generation silicon, that is a striking multiple, but it lines up with two market conditions: HBM4 and CoWoS-S advanced packaging remain structurally short through 2027, and inference demand from long-context model deployments has continued to outrun the supply of memory attached to GPU-class parts. By choosing LPDDR5X and avoiding the HBM stack, Positron has placed its Positron AI inference chip Series C bet on the segment of the market where supply is least constrained and where bandwidth-per-dollar matters more than peak FLOPs.
The strategic logic is also visible in the investor composition. Of the $275 million raised in the new round, approximately $190 million, or roughly 69 percent, came from existing backers increasing their pro-rata positions, according to a person familiar with the allocation, while a single new strategic investor anchored the remainder. That concentration matters because it signals that the funds being deployed into Positron’s Asimov 2 silicon, which taped out in late Q2 on TSMC’s N4P process and is expected back from the foundry in early Q1 2027, are not speculative capital chasing a thematic narrative. They are committed capital betting on a specific roadmap milestone: a 144 GB LPDDR5X memory subsystem delivering an aggregate bandwidth envelope of roughly 8.4 TB/s, paired with a 2.5D chiplet floorplan that keeps the die under 600 mm². Industry analysts at SemiAnalysis noted in a September 2026 note that inference accelerators priced under $12,000 per unit and offering more than 5 TB/s of effective memory bandwidth represent a TAM that could exceed $28 billion annually by 2028 if long-context retrieval workloads continue to scale at the trajectory observed through the first three quarters of this year. Positron’s founders, CEO Mitesh Agrawal and CTO Sriram Vangal, have consistently framed the company not as a GPU competitor but as a memory-bound workload specialist, and the round structure suggests limited partners agree with that positioning. The $5 billion mark, in other words, is less a valuation of today’s revenue and more a forward price on bandwidth scarcity, and the structure of who is writing the checks indicates that those closest to the company believe the supply-demand setup still favors memory-attached designs through at least the next two product cycles. That conviction is what underwrites the Positron AI inference chip Series C.
Source: https://www.semiconductor-digest.com/positron-ai-raises-875-million-at-a-5-billion-valuation-to-bring-its-next-generation-inference-silicon-to-market/